1011_PRACTICAL DIGITAL SYSTEMS DESIGN
Course Period：From2012-09-19 ~ Any Time
Course Intro
Course Plan
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00_Overview
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01_Introduction
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02-II_Basic Verilog Coding &Combinational Logic
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02-I_Basic Verilog Coding &Combinational Logic_I
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03_Basic Verilog Coding &Sequential Logic
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04_RTL Coding Guildlines
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05_Bus and a simple processor design
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06_Memory systems
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06_Memory systems_appendix
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07_Arithmetic and Logic Circuit Design_part I
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07_Arithmetic and Logic Circuit Design_part II
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08_Design for testability (DFT)
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Cache-operations
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Final_exam
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HW-Note
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HW1-1
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HW1-2
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HW2
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HW3
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HW4
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Introduction to Workstation Environment
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Memory Complier
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Midterm Examination_ref1
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Midterm Examination_ref2
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Project
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Synopsys Design Compiler Logic Synthesis EDA Tool
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TOTLE SCORE
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Workstation-operation-flow
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
李冠賢
李冠賢
Co-Instructor(s)
楊 碩
楊 碩
Co-Instructor(s)
郭俊緯
郭俊緯
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