1012_DESIGN OF DIGITAL SYSTEMS
Registration：FromNow ~ Any Time
Course Period：From2013-02-23 ~ Any Time
Course Intro
Course Plan
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00_Digital System Design
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01_Binary Systems
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02_Boolean Algebra and Logic Gates
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03_Gate-Level Minimization
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04_Combinational Logic
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05_Synchronous Sequential Logic
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05_Synchronous Sequential Logic_animation
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06_Registers and Counters
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DDS Mid Score
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DDS_score
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Exercise 6
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Final_exam_100-2
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Final_exam_99-2
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HW1-1_score
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HW1-2_score
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HW1_ans
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HW2-2_ans
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HW2_ans
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HW2_score
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HW3_ans
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HW3_score
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HW4_ans
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HW4_score
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HW5_ans
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Homework 1
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Homework 2
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Homework 3
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Homework 4
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Homework 5
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Midterm_exam_100-2
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Midterm_exam_101-2
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Midterm_exam_99-2
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QuartusII_tutorial
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Unit 4_exercise
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answer_finalexam_100-2
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answer_finalexam_99-2
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answer_midterm99-2
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mid_ans_100-2
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加分紀錄
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補課影片_20130611
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
彭依涵
彭依涵
Co-Instructor(s)
郭俊緯
郭俊緯
Co-Instructor(s)
王致皓
王致皓
Co-Instructor(s)
呂偉豪
呂偉豪
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