1031_DESIGN OF DIGITAL SYSTEMS
Course Period：From2014-09-17 ~ Any Time
Course Intro
Course Plan
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00_Digital System Design
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01_Binary Systems
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02_Boolean Algebra and Logic Gates
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03_Gate-Level Minimization
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04_Combinational Logic
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05_Synchronous Sequential Logic
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05_Synchronous Sequential Logic_animation
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06_Registers and Counters
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DSD_期中考試教室分配表1
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DSD_期末考試教室分配
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Final_exam_100-2
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Final_exam_99-2
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HW1_answer
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HW1_grade
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HW5_ANS
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HW5_grade
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Homework 1
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Homework 2
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Homework 3
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Homework 4
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Homework 5
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MID solution
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Midterm_exam_100-2
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Midterm_exam_99-2
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QuartusII_download
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QuartusII_tutorial_13.0_1
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Quartus成績
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Sequential_Circuits_ver1.0
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answer_finalexam_100-2
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answer_finalexam_99-2
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answer_midterm99-2
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final_solu
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grade_1_to_mid
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hw3 solution
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mid_ans_100-2
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缺席
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期末考
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課堂加分
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
陳勁儒
陳勁儒
Co-Instructor(s)
池宗亮
池宗亮
Co-Instructor(s)
許晉銨
許晉銨
Co-Instructor(s)
鄭冠之
鄭冠之
Co-Instructor(s)
詹尚恩
詹尚恩
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