1041_DESIGN OF DIGITAL SYSTEMS
Registration：FromNow ~ Any Time
Course Period：From2015-09-16 ~ Any Time
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Course Intro

Course Plan

  • 00_Digital System Design
  • 01_Binary Systems
  • 02_Boolean Algebra and Logic Gates
  • 03_Gate-Level Minimization
  • 04_Combinational Logic
  • 05_Synchronous Sequential Logic
  • 05_Synchronous Sequential Logic_animation
  • 20151204class
  • 20151211class
  • 20151218class
  • 20151225class
  • 20151225last_class
  • 20160108_class
  • Final_Score
  • Final_exam_100-2
  • Final_exam_99-2
  • HW_Grade
  • Homework 1
  • Homework 1_sol
  • Homework 2
  • Homework 2_sol
  • Homework 3
  • Homework 3_sol
  • Homework 4
  • Homework 4_sol
  • Homework 5
  • Homework 5_sol
  • Midterm_exam_100-2
  • Midterm_exam_99-2
  • QuartusII_download
  • QuartusII_tutorial_13.0_22&HW
  • QuartusII_tutorial_13.0_22
  • QuartusII_tutorial_13.0_22完整
  • Sequential_Circuits_ver1.0
  • Unit 4_exercise
  • answer_finalexam_100-2
  • answer_finalexam_99-2
  • answer_midterm99-2
  • mid_ans_100-2
Co-Instructor(s)
謝東佑
Co-Instructor(s)
詹尚恩
Co-Instructor(s)
鐘振嘉
Co-Instructor(s)
吳美蓉
Co-Instructor(s)
鍾裕民
Co-Instructor(s)
鄭岱昂

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LINE sharing feature only supports mobile devices