1041_DESIGN OF DIGITAL SYSTEMS
Registration：FromNow ~ Any Time
Course Period：From2015-09-16 ~ Any Time
Course Intro
Course Plan
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00_Digital System Design
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01_Binary Systems
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02_Boolean Algebra and Logic Gates
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03_Gate-Level Minimization
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04_Combinational Logic
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05_Synchronous Sequential Logic
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05_Synchronous Sequential Logic_animation
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20151204class
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20151211class
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20151218class
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20151225class
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20151225last_class
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20160108_class
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Final_Score
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Final_exam_100-2
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Final_exam_99-2
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HW_Grade
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Homework 1
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Homework 1_sol
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Homework 2
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Homework 2_sol
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Homework 3
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Homework 3_sol
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Homework 4
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Homework 4_sol
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Homework 5
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Homework 5_sol
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Midterm_exam_100-2
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Midterm_exam_99-2
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QuartusII_download
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QuartusII_tutorial_13.0_22&HW
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QuartusII_tutorial_13.0_22
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QuartusII_tutorial_13.0_22完整
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Sequential_Circuits_ver1.0
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Unit 4_exercise
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answer_finalexam_100-2
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answer_finalexam_99-2
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answer_midterm99-2
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mid_ans_100-2
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
詹尚恩
詹尚恩
Co-Instructor(s)
鐘振嘉
鐘振嘉
Co-Instructor(s)
吳美蓉
吳美蓉
Co-Instructor(s)
鍾裕民
鍾裕民
Co-Instructor(s)
鄭岱昂
鄭岱昂
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