1052_VLSI DESIGN
Course Period：FromNow ~ Any Time
Course Intro
Course Plan
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00_syllabus (2017s VLSI)
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01_Introduction (2017s VLSI)
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02_CMOS fabrication (2017s VLSI)
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03 SPICE simulation (2017s VLSI)
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04_combinational logic circuis (2017s VLSI)
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05_sequential logic circuits (2017s VLSI)
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06_MOS transistor characteristics (2017s VLSI)
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07_Delay models (2017s VLSI)
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08_power (2017s VLSI)
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09_wiring and scaling (2017s VLSI)
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10_static and dynamic circuit (2017s VLSI)
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11_Memory (2017s VLSI)
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12_FA, IO, clock tree (2017s VLSI)
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13_More on IC Fabrication (2017s VLSI)
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Homework 1_Circuit Simulation (2017s)
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Homework 2_Layout and Post-layout Simulation (2017s VLSI)
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Homework 3_Full Adder based on NAND2 and INV (2017s VLSI)
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Homework 4_Synopsys Models and LEF Models (2017s VLSI)
Co-Instructor(s)
蕭勝夫
蕭勝夫
Co-Instructor(s)
張志玄
張志玄
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