1071_SYSTEM-ON-CHIP DESIGN
Course Period：From2018-09-12 ~ Any Time
Course Intro
Course Plan
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00_System-on-chip Design
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01_Introduction
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02-II_Basic Verilog Coding &Combinational Logic
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02-I_Basic Verilog Coding &Combinational Logic
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03_CPU Design Basics
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04_Basic Verilog Coding &Sequential Logic
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05_Logic Synthesis
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06_Pipelined CPU Design
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07_Cache Memory Design
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08_RTL Coding Guildlines
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09_Bus-based system design
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10_Verification
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11_Design for testability (DFT) and reliability
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12_Physical design
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13_Performance evaluation
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14_Memory Practice
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Encounter
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HW-Note
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HW1
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HW1_成績
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HW1_參考1
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HW1_參考2
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HW2
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HW2_成績
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HW2_參考1
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HW2_參考2
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HW3
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HW3_成績
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HW3_參考1
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HW3_參考2
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HW4
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HW4_成績
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HW5
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HW5_成績
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HW6
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HW6_成績
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IPQ1
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Introduction to Workstation Environment
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MEM_4096_32
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Midterm Examination_104-1
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Project_Report_format
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SOC_成績總表
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SOC_報告梯次
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SUMA180_1024X32X1BM1
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Tool_covered
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Tool_covered使用
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Workstation-operation-flow
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counter
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mmmc
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synopsys_dc
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synopsys_dc.setup
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tb_counter
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工作站安裝及連線教學
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參考資料_HOWEWORK1書面報告
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期末口頭報告
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期末成績評分表
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期末個人成績評分表
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期末專題規格
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
李寶茜
李寶茜
Co-Instructor(s)
邱育仁
邱育仁
Co-Instructor(s)
林遠呈
林遠呈
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