1111_SYSTEM-ON-CHIP TESTING_EE5729
Course Period：FromNow ~ Any Time
Course Intro
Course Plan
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00_Overview
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01_Introduction
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02_Fault model
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03_Faul simulation
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mind map tutorial
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Midterm Examination_ref
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期中考參考解答
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04_Test generation
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[Video] EX1_Fault simulation
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[Video] Introduction to Workstation Environment
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05_Testability Analysis
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06_Design for testability
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SOC Server Overview
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EX1_Fault simulation
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EX2_ATPG
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EX3_Scan-InsertionATPG
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Homework1
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Homework2
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Homework3
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Homework4
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Homework5
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Final Examination_ref
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07_Logic BIST_Intro1
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08_Memory Testing_Intro
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
陳維鴻
陳維鴻
Co-Instructor(s)
林敬偉
林敬偉
Co-Instructor(s)
黃裕勛
黃裕勛
Co-Instructor(s)
王翊瑄
王翊瑄
Co-Instructor(s)
林佩璇
林佩璇
Co-Instructor(s)
張瑋之
張瑋之
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