1131_DESIGN AND IMPLEMENTATION OF ARITHMETIC UNITS_CSE583
Course Period：FromNow ~ Any Time
Course Intro
Course Plan
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00_course outlines (2024f)
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FXP_adder
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testbench
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testbench explanation
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Verilog review (for ALU HW)
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cover page of homework report
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01 Introduction_revised_2 (2024f)
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ALU HW1_adder and multiplier_revised (2024f)
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HW1_single-precision FLP adder and multiplier_revised (2024f)
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HW2_Design of single-precision FMA (2024f)
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ALU HW2_FLP FMA (2024f)
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02_Floating-Point Arithemtic(2 024f)
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03_Addition v2 (2024f)
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99_1_alu_midterm review
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04_Multiplication_revised (2024f)
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HW3_Design of multi-precision FLP DP4 (2024f)
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ALU HW3_Multi-Precision FLP DP4 (2024f)
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2024f_alu_midterm_revised_5 (with answers)
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multiply_signed_booth
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multiply_unsigned
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multiply_signed
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ALU HW4_sign-extension bits reduction_revised (2024f)
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ALU HW5_truncated multipliers_revised (2024f)
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06_dvision (2024f)
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05_function evaluation(2024f)
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HW5_truncated multipliers (2024f)
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HW4_sign-extension-reduction (2024f)
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99_2_alu final exam review (2024f)
Co-Instructor(s)
蕭勝夫
蕭勝夫
Co-Instructor(s)
郭昱
郭昱
Co-Instructor(s)
黃宥翔
黃宥翔
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