1132_PRACTICAL DIGITAL SYSTEMS DESIGN_EE3705
Registration:FromNow ~ Any Time
Course Period:FromNow ~ Any Time
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Course Intro

Course Plan

  • 00_Overview
  • 01_Introduction
  • 02-I_Basic Verilog Coding &Combinational Logic
  • 02-II_Basic Verilog Coding &Combinational Logic
  • 03_SOC Server Overview
  • HW1
  • 04_Adder designs
  • 05_Synopsys Design Compiler Logic Synthesis EDA Tool
  • HW2
  • 06_Basic Verilog Coding &Sequential Logic
  • 07_Multiplier designs
  • 20170426_Midterm Examination
  • HW3
  • HW4
  • 08_RTL Coding Guildlines
  • 113-2PDSD期末專題
  • 09_Verification
  • 10_AI Accelerator Design for Intelligent Image Processing- Fundamentals, Opportunities, and Challenges
Co-Instructor(s)
謝東佑
Co-Instructor(s)
黃悅慈
Co-Instructor(s)
劉威辰

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LINE sharing feature only supports mobile devices