1002_系統晶片設計
報名期間：從 即日起 到 無限期
上課期間：從 2012-02-20 到 無限期
課程介紹
課程安排
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00_System-on-chip Design
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01_Introduction
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02_Basic Verilog Coding &Combinational Logic
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03_Basic Verilog Coding &Sequential Logic
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04_CPU Design Basics
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05_Pipelined CPU Design
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06_RTL Coding Guildlines
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Cell-Based Physical Design Flow Using Design Vision and SOC Encounter EDA Tools
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FunctionallVerification_TransEDA
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HW-Note
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Homework1-1
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Homework1-2
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Homework2
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Homework3
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Homework4
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Homework5
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Introduction to Workstation Environment
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Midterm Examination_99-2
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Project
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SOC分組名單
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Synopsys Design Compiler Logic Synthesis EDA Tool
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grade
教師 / 謝東佑
教師 / 謝依潔
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