1011_SYSTEM-ON-CHIP TESTING
Course Period：From2012-09-19 ~ Any Time
Course Intro
Course Plan
-
00_Overview
-
01_Introduction
-
02_Faul model
-
03_Faul simulation
-
04_Test generation
-
05_Testability Analysis
-
06_Design for testability
-
07_BIST
-
08_Memory testing
-
09_Fault-tolerant design
-
10_Board&System-level testing
-
20121227
-
Assitsant_01_Introduction to Workstation
-
Assistant_02_Fault simulation
-
Assistant_03_ATPG
-
Final Examination_ref1
-
Final Examination_ref2
-
Grade
-
Grade_HW1
-
Grade_HW4
-
HW1_Fault simulation
-
HW1_reference_answer
-
HW2_ATPG
-
HW2_reference_answer
-
HW3_Testability Analysis
-
HW3_reference_answer
-
HW4_Scan-Insertion&ATPG
-
HW4_reference_answer
-
Midterm Examination_ref
-
SCOAP_Testability Analysis
Co-Instructor(s)
謝東佑
謝東佑
Co-Instructor(s)
紀雅修
紀雅修
Co-Instructor(s)
高天財
高天財
Co-Instructor(s)
顧家齊
顧家齊
Related Courses
|
|
||||||
|
|
|
||||||
|
|
|
||||||
|
|
|
||||||
|