1021_實用數位系統設計
報名期間：從 即日起 到 無限期
上課期間：從 2013-09-23 到 無限期
課程介紹
課程安排
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00_Overview
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01_Introduction
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02-II_Basic Verilog Coding &Combinational Logic
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02-I_Basic Verilog Coding &Combinational Logic
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03_Basic Verilog Coding &Sequential Logic
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04_Bus and a simple processor design
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05_RTL Coding Guildlines
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06_Arithmetic and Logic Circuit Design
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07_Memory systems
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08_Cache Memory Design
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Calibre_verification
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Exercise
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HW-Note
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HW1-1
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HW1-2
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HW1_1_Score
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HW1_2_Score
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HW2
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HW2_Score
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HW3
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HW3_Score
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HW4
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HW4_Score
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Introduction to Workstation Environment
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Memory Compiler Training
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Memory Complier
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Midterm Examination_101-1
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Midterm_1_Score
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Midterm_2_Score
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Project
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Project_Score
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SOC_Encounter
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Synopsys Design Compiler Logic Synthesis EDA Tool
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Workstation-operation-flow
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分組名單
教師 / 謝東佑
教師 / 王致皓
教師 / 池宗亮
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