1031_SYSTEM-ON-CHIP DESIGN
Course Period：From2014-09-17 ~ Any Time
LINE sharing feature only supports mobile devices

Course Intro

Course Plan

  • 00_System-on-chip Design
  • 01-II_Basic verilog coding for combinational building blocks
  • 01-I_Basic verilog coding for combinational building blocks
  • 02_Basic Verilog Coding for Sequential Logic
  • 03_CPU Design Basics
  • 04_Pipelined CPU Design
  • 05_Cache Memory Design
  • 06_Branch Prediction
  • 07_ARM Processor Basics
  • 08_RTL Coding Guildlines
  • 09_Verification
  • Covered – Verilog Code Coverage Analyzer
  • Design Compiler
  • Encounter_U18
  • Encounter_example
  • HW-Note
  • HW1-1
  • HW1-2
  • HW2
  • HW3
  • HW4
  • HW5
  • IoT and Wearable design technology
  • Memory Simulation and Synthesis
  • Midterm Examination_ref
  • Project
  • Score_HW1_1
  • Score_HW1_2
  • Score_HW2
  • Score_HW3
  • Score_HW4
  • Score_HW5
  • Workstation-operation-flow
  • afterenc_umc18
  • covered-0.7.10.tar
  • covered_example
  • synthesis_and_memory
  • 參考資料_HOWEWORK1書面報告
Co-Instructor(s)
謝東佑
Co-Instructor(s)
彭依涵
Co-Instructor(s)
王致皓

Related Courses

1081_THE THEORY OF COMPUTATION
邱日清
Period：Not set
1051_POWER ELECTRONICS CONVERTER
莫清賢
Period：Not set
LINE sharing feature only supports mobile devices