1092_實用數位系統設計
報名期間:從 即日起 到 無限期
上課期間:從 即日起 到 無限期
課程介紹
課程安排
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00_Overview
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01_Introduction
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02-I_Basic Verilog Coding &Combinational Logic
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02-II_Basic Verilog Coding &Combinational Logic
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03-1_Introduction to Workstation Environment
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03-II_Workstation-operation-flow
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04_Adder designs
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05_Synopsys Design Compiler Logic Synthesis EDA Tool
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06_Basic Verilog Coding &Sequential Logic
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07_Multiplier designs
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08_RTL Coding Guildlines
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09_Verification
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20170426_Midterm Examination
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0519上課說明事項公告
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Final Project_v6
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HW1-1
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HW1-2
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HW2
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HW3
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HW-Note
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HOWEWORK書面報告範例
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ICC_example
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SOC-Server-Overview_v2
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nWave
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EX1_File
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EX2_File
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EX2_lecture
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EX3_File
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Covered – Verilog Code Coverage Analyzer
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Covered
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DesignWare操作手冊
教師 / 謝東佑
教師 / 趙偉霽
教師 / 邱翔
教師 / 湯宏杰
教師 / 侯憲璋