1131_系統晶片測試_EE5729
上課期間：從 即日起 到 無限期
課程介紹
課程安排
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00_Overview
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01_Introduction
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Homework Rule
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02_Fault model
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03_Faul simulation
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Homework1
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Midterm Examination_ref
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04_Test generation
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Homework2
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EX1_Fault simulation
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Homework3
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PODEM_worksheet
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PODEM_worksheet_after_class
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05_Testability Analysis
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06_Design for testability
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07_BIST
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07_Logic BIST_Intro1
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07_Logic BIST_LFSR
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07_Logic BIST_LFSR polynomial
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07_Logic BIST_Intro2
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07_Logic BIST_Parallel ORA MISR
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07_Logic BIST_Architecture
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07_Logic BIST_SerialORA
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[Ref-handout]07_BIST
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Seq_test_generation_worksheet
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Homework4
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SCOAP_worksheet
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test_operation_worksheet
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Homework5
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Final Examination_ref
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EX2_ATPG_v2
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EX3_Scan-Insertion_ATPG_v2
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final_exam_classroom
教師 / 謝東佑
教師 / 甄致瑜
教師 / 黃柏愷
教師 / 廖國宏
教師 / 吳閏琮
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